

The former is called a tri-gate transistor and the latter a double-gate transistor. The gate of the transistor can cover and electrically contact the semiconductor channel fin on both the top and the sides or only on the sides. The first FinFET transistor type was called a "Depleted Lean-channel Transistor" or "DELTA" transistor, which was first fabricated in Japan by Hitachi Central Research Laboratory's Digh Hisamoto, Toru Kaga, Yoshifumi Kawamoto and Eiji Takeda in 1989. They demonstrated that short-channel effects can be significantly reduced by sandwiching a fully depleted silicon-on-insulator (SOI) device between two gate electrodes connected together. Sekigawa fabricated the XMOS transistor with Yutaka Hayashi at the ETL in 1984. A double-gate MOSFET was later proposed by Toshihiro Sekigawa of the Electrotechnical Laboratory (ETL) in a 1980 patent describing the planar XMOS transistor. History Īfter the MOSFET was first demonstrated by Mohamed Atalla and Dawon Kahng of Bell Labs in 1960, the concept of a double-gate thin-film transistor (TFT) was proposed by H. It is common for a single FinFET transistor to contain several fins, arranged side by side and all covered by the same gate, that act electrically as one, to increase drive strength and performance. Microchips utilizing FinFET gates first became commercialized in the first half of the 2010s, and became the dominant gate design at 14 nm, 10 nm and 7 nm process nodes. It is the basis for modern nanoelectronic semiconductor device fabrication. įinFET is a type of non-planar transistor, or "3D" transistor. The FinFET devices have significantly faster switching times and higher current density than planar CMOS (complementary metal–oxide–semiconductor) technology. These devices have been given the generic name "FinFETs" because the source/drain region forms fins on the silicon surface.


A fin field-effect transistor ( FinFET) is a multigate device, a MOSFET (metal–oxide–semiconductor field-effect transistor) built on a substrate where the gate is placed on two, three, or four sides of the channel or wrapped around the channel, forming a double or even multi gate structure.
